1. Field of the Invention
The present invention relates to a method and apparatus for transferring data from one register to another in general and to a method and apparatus for transferring data in parallel from a smaller to a larger register in particular.
2. Discussion of Prior Art
Usually data is transferred in parallel between registers of equal size using a common clock. However, on occasion, it is desirable and sometimes necessary to transfer data in parallel from a smaller register to a larger register.
In the past, when data has been transferred in parallel from a smaller to a larger register, it has been the practice to temporarily store a first word comprising a first predetermined number of bits from the smaller register in latches. Thereafter, the first word from the latches and a second word comprising a second number of predetermined bits from the smaller register were transferred in parallel to the larger register. Usually, though not necessarily, the smaller register was half the size of the larger register and consequently the data transfer to the larger register simply comprised two successive transfers of a word comprising bits equal in number to the size of the smaller register.
To avoid a loss of speed which would otherwise result as a consequence of transferring two or more data words out of one register and into a larger register in parallel, it has been the practice to clock the data out of the smaller register at a multiple of the clock rate used for clocking data into the larger register. For example, if the larger register was twice the size of the smaller register, the clock rate used for transferring data out of the smaller register and into the larger register was typically twice the rate used for clocking data in parallel into the larger register.
Heretofore, the registers between which data transfers were made and the latching circuits used for transferring data from a smaller to a larger register were typically fabricated on separate integrated circuit components. Thus, when it became necessary or desirable to transfer data in parallel from a smaller to a larger register, it was necessary to assemble and connect the separate integrated circuit components containing the registers and the latches together to form the required apparatus. As a consequence, the use of latches to temporarily store bits in the process of transferring data in parallel from a smaller to a larger register was expensive both in terms of the cost of the latches as well as in terms of the space required to accommodate the latches and the circuitry required to connect them between the smaller and larger registers.